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Get Six Five Media's inside look at the technologies powering the next phase of AI at the AI Infra Summit 2026 in Santa Clara, California.
As AI workloads grow, the industry faces urgent questions around cost, energy consumption, performance, and scalability. Six Five Media analysts Matt Kimball and Brendan Burke sit down with leaders from Synopsys, Ambarella, Western Digital, and more to explore the latest advances in compute, storage, and infrastructure, and what they mean for the future of AI.
What Happens When AI Starts Designing the Chips That Power It | Synopsys at AI Infra Summit
At AI Infra Summit 2026, Synopsys' Thomas Andersen joins Brendan Burke and Matt Kimball to explain how chip design is moving from AI copilots that suggest to agentic systems that execute tool orchestration, timing fixes, and verification from a written spec. For enterprises, that shift compresses spec-to-tapeout timelines and lowers the resource barrier to custom silicon.
WD's Tim Rausch: AI Storage Demand Compounds With Every GPU Cycle
Western Digital's Tim Rausch argues that AI's compounding data growth, more than GPU capacity, sets the real ceiling on infrastructure scaling. He joins Matt Kimball at AI InfraSummit 2026 to walk through how total cost of ownership, archived data reuse, and WD's capacity roadmap are reshaping enterprise plans to scale AI over the next several years.
Fleet-Scale Deployment Is the Physical AI Benchmark
Physical AI is shifting from lab prototypes to fleets of machines operating reliably in the real world, and Ambarella's Muneyb Minhazuddin joins Six Five On The Road at AI Infra 2026 to explain what that shift demands of silicon, memory and developer workflows. Minhazuddin traces the case back to a 22-year-old chip architecture and forward to a developer cloud built to compress model porting time from months to days, and he identifies enterprise ROI proof points as the biggest hurdle left before physical AI scales into millions of deployed units.
What Happens When AI Starts Designing the Chips That Power It | Synopsys at AI Infra Summit
At AI Infra Summit 2026, Synopsys' Thomas Andersen joins Brendan Burke and Matt Kimball to explain how chip design is moving from AI copilots that suggest to agentic systems that execute tool orchestration, timing fixes, and verification from a written spec. For enterprises, that shift compresses spec-to-tapeout timelines and lowers the resource barrier to custom silicon.
WD's Tim Rausch: AI Storage Demand Compounds With Every GPU Cycle
Western Digital's Tim Rausch argues that AI's compounding data growth, more than GPU capacity, sets the real ceiling on infrastructure scaling. He joins Matt Kimball at AI InfraSummit 2026 to walk through how total cost of ownership, archived data reuse, and WD's capacity roadmap are reshaping enterprise plans to scale AI over the next several years.
Fleet-Scale Deployment Is the Physical AI Benchmark
Physical AI is shifting from lab prototypes to fleets of machines operating reliably in the real world, and Ambarella's Muneyb Minhazuddin joins Six Five On The Road at AI Infra 2026 to explain what that shift demands of silicon, memory and developer workflows. Minhazuddin traces the case back to a 22-year-old chip architecture and forward to a developer cloud built to compress model porting time from months to days, and he identifies enterprise ROI proof points as the biggest hurdle left before physical AI scales into millions of deployed units.